An integrated circuit (IC), e.g., a microprocessor chip, generally comprises a transistor layer and a plurality of interconnect layers. The interconnect layers are typically metal, e.g., aluminum, and the interconnect layers are usually separated by some type of dielectric material, e.g., silicon dioxide (SiO2), for insulation between the metal interconnect layers. The transistor layer typically comprises a plurality of logical cells, and such metal interconnect layers are used not only to route signals from one logical cell to another, but the metal interconnect layers are also used to route power from a power connection that is exposed to a power source to components within the integrated circuit.
Typically, the metal interconnect layers comprise alternating and variable power and ground buses, referred to in the art as a “power grid.” The power grid typically encompasses, on each interconnect level, a series of alternating buses, e.g., alternating between power and ground, and the buses are often directionally oriented in alternating fashion per metal interconnect level. For example, an IC may comprise eight metal interconnect layers (M1-M8) wherein the top metal layer M8 comprises alternating power and ground buses oriented horizontally relative to the power and ground buses of metal layer M7, which may be oriented vertically, thereby forming power and ground buses orthogonal to adjacent metal interconnect layers. Connections, sometimes referred to as “vias,” are made from one metal layer to another in order to connect logic cells formed on the transistor layer and to provide power and ground from the top metal interconnect layer M8 to the transistor layer. Such via connections are said in the art to provide contact between the various metal interconnect layers.
An IC design engineer typically uses a design tool that allows the engineer to visually create a graphical representation of circuit diagrams that effectuate a particular functionality related to an IC. The automated tool then transforms the graphical representation into related data that describes the layout of the circuit. Frequently, each design engineer in a team of design engineers is assigned a design “block” which the design engineer is responsible for creating. A block refers to a three-dimensional portion of the IC that is designed to perform a particular function. The block usually includes a plurality of logic cells, which are typically interconnected to perform a desired function assigned to the engineer. The interconnections between the logic cells are typically made using the lower metal layers, and such interconnections are commonly referred to as “signal routes.”
In addition to routing signals between the plurality of logical cells, the metal interconnect layers are also used to distribute power from an external source to the logical cells. The top layer M8 often receives power (VDD) and ground (GND), then distributes the power through vias to the logical cells that are in need of power and ground. Typically, in the IC design process, the step of routing power to the blocks of an IC is performed manually.